[added comments to original text shown in light purple]
Since this chip is essentially a combination of the ANTIC and GTIA chips, much of the text simply replicates that found in the technical documentation for the seperate chips. Therefore, such text has been omitted. If possible, I will add links to appropriate text. The CGIA data sheet does have more detailed information about color signal generation than the GTIA document, in particular regarding the voltage levels and color carrier phase angles. This is quite extensive and tedious to type in, so I leave it to the pdf files if you really need it.
The CGIA was designed to reduce the cost of machines that used Atari's ANTIC and GTIA chips. The GTIA section was address decoded to be at an address compatible with the games machines, so that was probably the priority. Perhaps the 800 series machines would have had this altered address and require software modifications? The CGIA chip made it to the prototype stage, but was never deployed commercially.
The CGIA is an NMOS custom circuit designed to generate sophisticated playfield and player/missile graphics for display on an NTSC television system. The CGIA converts graphics data stored in memory into composite video and chrominance information required by a television RF modulator. The CGIA also provides four bits of input from the joystick controllers and four bits of general purpose I/O.
| A0-15 <-> | Address Bus
I/O and decode |
DMA timing and Control |
Character Name Buffer |
Playfield graphics |
Priority Control |
Luminance Control |
---> CLUM | |
| D0-7 <-> | Data Bus I/O | Collision Detection |
Player- Missile graphics |
Color Control |
---> COL | |||
| LP --> R/!W <-> Ø2 --> RDY <-- !NMI <-- Ø0 <-- OSC --> !RES --> !RNMI --> |
Timing and Control |
Switch I/O port |
Trigger Input Port |
<--- T0-T3 | ||||
| ^ | v S0-S3 |
||||||||
| --> | osc | 1 | - -CGIA- - | 48 | ph2 | <-- |
| --> | s3 | 2 | 47 | a3 | <-> | |
| --> | s2 | 3 | 46 | a2 | <-> | |
| <-- | color | 4 | 45 | a1 | <-> | |
| --> | s1 | 5 | 44 | a0 | <-> | |
| --> | s0 | 6 | 43 | r/!w | <-> | |
| nc | 7 | 42 | ph0 | --> | ||
| Vcc | 8 | 41 | !rst | <-- | ||
| <-- | clum | 9 | 40 | !halt | --> | |
| --> | t3 | 10 | 39 | !ref | --> | |
| --> | t2 | 11 | 38 | rdy | --> | |
| --> | t1 | 12 | 37 | !rnmi | <-- | |
| --> | t0 | 13 | 36 | Vss | ||
| <-> | a4 | 14 | 35 | !lp | <-- | |
| <-- | a5 | 15 | 34 | !nmi | --> | |
| <-- | a6 | 16 | 33 | d7 | <-> | |
| <-- | a7 | 17 | 32 | d6 | <-> | |
| <-> | a8 | 18 | 31 | d5 | <-> | |
| <-> | a9 | 19 | 30 | d4 | <-> | |
| <-> | a10 | 20 | 29 | d3 | <-> | |
| <-> | a11 | 21 | 28 | d2 | <-> | |
| <-> | a12 | 22 | 27 | d1 | <-> | |
| <-> | a13 | 23 | 26 | d0 | <-> | |
| <-> | a14 | 24 | 25 | a15 | <-> |
The CGIA is a custom NMOS LSI device that is capable of accessing graphics data stored in system memory and generating composite video and chroma signals necessary for interfacing to an NTSC video standard television. The CGIA is a single-chip version of the ANTIC (Graphics processor) and GTIA (Television Interface Adapter) chips. The CGIA is completely software compatible with the ANTIC and GTIA chips. The CGIA requires fewer external components since the address decode for GTIA has been added on-chip as well as the video-DAC for generating somposite video (luminance and sync signals). The color frequency generator with externals color adjustment has been replaced with an enhanced color frequency generator, thereby eliminating the need for external color adjustment.
Due to the complexity of the CGIA design, special test functions were added in order to make LSI testing easier. These functions are enabled by executing a read operation at addresses CX16, CX17, and CX18. When one of these addresses is read, internal control signals are output on the switch I/O port. It is VERY IMPORTANT that these addresses are not read at any time during normal operation. Doing so could result in program failure. The switch lines as returned to their normal functions at any time the switch I/O register is written to. For more information on the special test functions, refer to test supplement TS20577.
The CGIA is the combination of the ANTIC and GTIA custom LSI devices. In order to maintain system compatibility, the address decode is the same as it is on the 5200XL (PAM) home video game system.
The ANTIC section of the CGIA occupies address space D4XX [same as per the Atari 800XL]. Many of these address locations are not actually used or are memory shadows. All of these address are either read-only or write-only registers. The same address may select two different registers depending on whether the memory access is a read or write operation. There are four read-only addresses in the ANTIC section of the CGIA. These registers are accessed at D4XB-D4XD and D4XF. The other read addresses from D4X0-D4XA and D4XE are not used and will return invalid data if read. There are 11 write-only registers in the ANTIC section of the CGIA. These registers are accessed at D4X0-D4X5, D4X7, D4X9-D4XA and D4XE-D4XF. The other write-addresses, D4X6 and D4XB-D4XD are not used.
The GTIA section of the CGIA occupies address space C0XX [not D0XX as it is on the Atari 800XL]. Many of these address locations are not actually used or are memory shadows. All of these address are either read-only or write-only registers with the exception of the Switch I/O port, which is a read/write register. The same address location may select two different registers depending on whether the memory access is a read or write operation. There are 24 read-only addresses in the GTIA section of the CGIA. These registers are accessed at CX00-CX14 and CX16-CX18. The other read addresses from CX15 and CX19-CX1E are not used and will return invalid data if read. There are 31 write-only registers in the GTIA section of the CGIA. These registers are accessed at CX00-1E. The single read/write register is accessed at CX1F. Refer to the CGIA address table at the end of this specification for more information.
IT SHOULD BE NOTED THAT THE READ ADDRESSES CX16-CX18 ARE RESERVED FOR LSI TESTING PURPOSES AND SHOULD NOT BE READ BY SOFTWARE DURING NORMAL OPERATION.